- Patent Title: Plasma etch singulated semiconductor packages and related methods
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Application No.: US15395181Application Date: 2016-12-30
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Publication No.: US11037903B2Publication Date: 2021-06-15
- Inventor: Darrell Truhitte
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Adam R. Stephenson, Ltd.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/00 ; H01L21/78 ; H01L23/544 ; H01L21/48 ; H01L21/56 ; H01L21/311

Abstract:
A method of forming a plurality of semiconductor packages includes providing an array of unsingulated semiconductor packages that are at least partially encapsulated in an encapsulant. The array of unsingulated semiconductor packages may be coupled with a lead frame or a substrate. A first plurality of singulation lines are simultaneously etched in the encapsulant through slits in an etch mask using a plasma etching process and a fixture coupled with the array. A second plurality of parallel singulation lines may also be etched. The first and second pluralities of singulation lines may include substantially straight or arcuate lines. The second plurality of parallel singulation lines may be substantially perpendicular to the first plurality of parallel singulation lines and be formed using the plasma etching process, the fixture, and an etch mask. The formation of singulation lines in the array singulates the array into a plurality of singulated semiconductor packages.
Public/Granted literature
- US20170110436A1 PLASMA ETCH SINGULATED SEMICONDUCTOR PACKAGES AND RELATED METHODS Public/Granted day:2017-04-20
Information query
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