A semiconductor memory device includes a substrate including a cell region on which memory sells are disposed and a connection region on which conductive patterns are disposed, the conductive patterns electrically connected to the memory cells; a first word line stack including a plurality of first word lines that are stacked on the substrate in the cell region and extend to the connection region; a second word line stack including a plurality of second word lines that are stacked on the substrate in the cell region and extend to the connection region, the second word line stack being adjacent to the first word line stack; vertical channels disposed on the cell region of the substrate, the vertical channels being connected to the substrate and respectively coupled with the plurality of first and second word lines; a bridge connecting one of the plurality of first word lines in the first word line stack to a corresponding word line of the second word line stack.