Circuits and methods for minimizing charge losses due to negative transient voltage at summing terminals of an analog to digital converter (ADC) are disclosed. The ADC is coupled to a multi-bit digital to analog converter (DAC) at the summing terminals. The ADC and the DAC include PMOS and NMOS transistors whose timing are controlled to reduce charge losses. The PMOS transistors are turned ON before the NMOS transistors. Also, the PMOS transistor of the ADC is turned ON at a slower rate than the PMOS transistors of the DAC.