- Patent Title: Single word line gain cell with complementary read write channel
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Application No.: US16722665Application Date: 2019-12-20
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Publication No.: US11043260B2Publication Date: 2021-06-22
- Inventor: Kamal M. Karda , Haitao Liu , Karthik Sarpatwari , Durai Vishak Nirmal Ramaswamy
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C11/40
- IPC: G11C11/40 ; G11C11/4096 ; H01L27/108 ; G11C11/4094
Abstract:
Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes multiple two-transistor (2T) memory cells. Each of the multiple 2T memory cells includes: a p-channel field effect transistor (PFET) including a charge storage node and a read channel portion, an n-channel field effect transistor (NFET) including a write channel portion that is directly coupled to the charge storage node of the PFET; a single bit line pair coupled to the read channel portion of the PFET; and a single access line overlapping at least part of each of the read channel portion and the write channel portion.
Public/Granted literature
- US20200211629A1 SINGLE WORD LINE GAIN CELL WITH COMPLEMENTARY READ WRITE CHANNEL Public/Granted day:2020-07-02
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