Invention Grant
- Patent Title: Integrated circuit devices with well regions
-
Application No.: US16390690Application Date: 2019-04-22
-
Publication No.: US11043431B2Publication Date: 2021-06-22
- Inventor: Chi-Feng Huang , Chia-Chung Chen , Victor Chiang Liang , Mingo Liu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L27/098
- IPC: H01L27/098 ; H01L29/36 ; H01L21/8249 ; H01L27/06 ; H01L27/085 ; H01L29/732 ; H01L29/808 ; H01L29/861 ; H01L29/93 ; H01L27/07 ; H01L29/06

Abstract:
A method includes forming a deep well region of a first conductivity type in a substrate, implanting a portion of the deep well region to form a first gate, and implanting the deep well region to form a well region. The well region and the first gate are of a second conductivity type opposite the first conductivity type. An implantation is performed to form a channel region of the first conductivity type over the first gate. A portion of the deep well region overlying the channel region is implanted to form a second gate of the second conductivity type. A source/drain implantation is performed to form a source region and a drain region of the first conductivity type on opposite sides of the second gate. The source and drain regions are connected to the channel region, and overlap the channel region and the first gate.
Public/Granted literature
- US20190252258A1 Integrated Circuit Devices with Well Regions Public/Granted day:2019-08-15
Information query
IPC分类: