Invention Grant
- Patent Title: ESD protection devices
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Application No.: US16183421Application Date: 2018-11-07
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Publication No.: US11043486B2Publication Date: 2021-06-22
- Inventor: Chih-Hsuan Lin , Shao-Chang Huang , Jia-Rong Yeh , Yeh-Ning Jou , Hwa-Chyi Chiou
- Applicant: Vanguard International Semiconductor Corporation
- Applicant Address: TW Hsinchu
- Assignee: Vanguard International Semiconductor Corporation
- Current Assignee: Vanguard International Semiconductor Corporation
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch LLP
- Main IPC: H01L27/02
- IPC: H01L27/02

Abstract:
A semiconductor structure includes a first P-well, a first P-type diffusion region, a first N-type diffusion region, a second P-type diffusion region, and a first poly-silicon layer. The first P-type diffusion region is deposited in the first P-well and coupled to a first electrode. The first N-well is adjacent to the P-well. The first N-type diffusion region is deposited in the first N-well. The second P-type diffusion region is deposited between the first P-type diffusion region and the first N-type diffusion region, which is deposited in the first N-well. The second P-type diffusion region and the first N-type diffusion region are coupled to a second electrode. The first poly-silicon layer is deposited on the first P-type diffusion region.
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