Invention Grant
- Patent Title: Multi-gate device and method of fabrication thereof
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Application No.: US16723559Application Date: 2019-12-20
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Publication No.: US11043561B2Publication Date: 2021-06-22
- Inventor: I-Sheng Chen , Cheng-Hsien Wu , Chih Chieh Yeh , Yee-Chia Yeo
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/06 ; H01L29/165 ; H01L29/423 ; H01L29/66 ; H01L29/786 ; H01L29/78 ; H01L27/088 ; H01L27/092 ; H01L21/8238
Abstract:
A semiconductor device includes a fin extending from a substrate. The fin has a source/drain region and a channel region. The channel region includes a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer and vertically separated from the first semiconductor layer by a spacing area. A high-k dielectric layer at least partially wraps around the first semiconductor layer and the second semiconductor layer. A metal layer is formed along opposing sidewalls of the high-k dielectric layer. The metal layer includes a first material. The spacing area is free of the first material.
Information query
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