A first portion of the poly-silicon layer is provided on a first face of a front surface of a semiconductor substrate via a gate insulating film in an edge termination region and configures a gate runner. The first portion opposes an edge p++-type contact region in a depth direction Z. A chip-end-side edge of the first portion is positioned within a plane of the edge p++-type contact region. A field oxide film disposed separated from the poly-silicon layer, extends from a chip end toward a chip center and, on the first face, terminates closer to the chip end than does the first portion. The entire surface of the poly-silicon layer is flat, free of a step due to the field oxide film. A chip-center-side edge of the field oxide film is closer to the chip end than is the edge p++-type contact region and positioned on a p-type base region.