Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US16102317Application Date: 2018-08-13
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Publication No.: US11049970B2Publication Date: 2021-06-29
- Inventor: Chun-Sheng Liang , Shih-Hsun Chang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/283 ; H01L29/66

Abstract:
A method of semiconductor fabrication includes forming a dielectric layer over a substrate. A dummy gate structure is formed on the dielectric layer, which defines a dummy gate dielectric region. A portion of the dielectric layer not included in the dummy gate dielectric region is etched to form a dielectric etch back region. A spacer element is formed on a portion of the dielectric etch back region, which abuts the dummy gate structure, and defines a spacer dielectric region A height of the dummy gate dielectric region is greater than the height of the spacer dielectric region. A recessed portion is formed in the substrate, over which a strained material is selectively grown to form a strained recessed region adjacent the spacer dielectric region. The dummy gate structure and the dummy gate dielectric region are removed. A gate electrode layer and a gate dielectric layer are formed.
Public/Granted literature
- US20190006517A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2019-01-03
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