Integrated circuit device
Abstract:
According to one embodiment, the first processing unit receives a first clock and outputs, at its first output node, data obtained by first processing of data at an input node. The second processing unit receives a first clock and outputs, at its second output node, data obtained by the first processing of the data at the input node. The third processing receives a second clock, outputs, from its third output nodes, data obtained by the first processing of the data at the input node, and outputs, from its fourth output nodes, data obtained by the first processing of the data at the input node. The determination unit outputs a first signal based on data at the fifth to eighth nodes respectively coupled to the first to fourth output nodes.
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