Acceleration module supporting controlled configuration of a programmable logic device
Abstract:
An electronic device includes a processor, a Nonvolatile Memory (NVM), and a Programmable Logic Device (PLD). The NVM stores loadable shell image and user image. The shell image supports communication with the processor, and each of the shell and user images implements a bus client for communication with a host in accordance with a bus protocol. The PLD connects to the processor and to the NVM. Upon initialization, the PLD is configured to load and run the shell image, to receive from the processor, by the shell image, an indication for selecting between the shell and user images, and when the indication selects the user image, to load the user image and run the loaded user image. The process of sequential loading of the shell and user images completes before the host concludes attempting to enumerate the bus client of the user image, in accordance with the bus protocol.
Information query
Patent Agency Ranking
0/0