Invention Grant
- Patent Title: Semiconductor device and method for manufacturing semiconductor device
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Application No.: US16623648Application Date: 2018-06-19
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Publication No.: US11056491B2Publication Date: 2021-07-06
- Inventor: Shunpei Yamazaki , Daisuke Matsubayashi , Tatsuya Onuki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JPJP2017-125578 20170627,JPJP2017-125608 20170627,JPJP2018-032992 20180227
- International Application: PCT/IB2018/054487 WO 20180619
- International Announcement: WO2019/003047 WO 20190103
- Main IPC: H01L27/105
- IPC: H01L27/105 ; H01L27/12 ; H01L29/786 ; H01L21/02 ; H01L21/4757 ; H01L29/24 ; H01L29/66 ; H01L21/477

Abstract:
A semiconductor device that can be highly integrated is provided. The semiconductor device includes a transistor, an interlayer film, and a first conductor. The transistor includes an oxide over a first insulator; a second conductor over the oxide; a second insulator provided between the oxide and the second conductor and in contact with a side surface of the second conductor; and a third insulator provided for the side surface of the second conductor with the second insulator therebetween. The oxide includes a first region, a second region, and a third region. The first region overlaps with the second conductor. The second region is provided between the first region and the third region. The third region has a lower resistance than the second region. The second region has a lower resistance than the first region. The interlayer film is provided over the first insulator and the oxide. The first conductor is electrically connected to the third region. The third region overlaps with one of the third insulator, the first conductor, and the interlayer film. A top surface of the third insulator is level with a top surface of the interlayer film.
Public/Granted literature
- US20200185386A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2020-06-11
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