Invention Grant
- Patent Title: Semiconductor device including a semi-insulating layer contacting a first region at a first surface of a semiconductor layer
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Application No.: US16552699Application Date: 2019-08-27
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Publication No.: US11056557B2Publication Date: 2021-07-06
- Inventor: Kazuki Minamikawa , Yukie Nishikawa , Kotaro Zaima
- Applicant: KABUSHIKI KAISHA TOSHIBA , TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Applicant Address: JP Tokyo; JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA,TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Current Assignee: KABUSHIKI KAISHA TOSHIBA,TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Current Assignee Address: JP Tokyo; JP Tokyo
- Agency: Kim & Stewart LLP
- Priority: JPJP2019-047140 20190314
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/861 ; H01L29/739 ; H01L29/78
Abstract:
A semiconductor device includes a semiconductor layer on a first electrode. The semiconductor layer includes a first region of a first type, a second region of a second type, a third region of the second type, and a fourth region of the first type. The second region is above the first region. The third region surrounds the second region. The fourth region surrounds the third region. The second electrode includes a first portion above the second region and a second portion surrounding the first portion. The third electrode surrounds the second electrode and is electrically connected to the fourth region. The semi-insulating layer is electrically connected to the second electrode and the third electrode. A first end portion of the first insulating layer is above the third region.
Public/Granted literature
- US20200295128A1 SEMICONDUCTOR DEVICE Public/Granted day:2020-09-17
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