Invention Grant
- Patent Title: Nanosheet transistor with dual inner airgap spacers
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Application No.: US16733487Application Date: 2020-01-03
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Publication No.: US11056570B2Publication Date: 2021-07-06
- Inventor: Ruilong Xie , Kangguo Cheng , Chun-Chen Yeh , Tenko Yamashita
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Garg Law Firm, PLLC
- Agent Rakesh Garg; Joseph Petrokaitis
- Main IPC: H01L29/49
- IPC: H01L29/49 ; H01L29/66 ; H01L29/06 ; H01L29/423 ; H01L29/786 ; H01L21/02 ; H01L21/8238 ; H01L21/306 ; H01L21/308 ; H01L27/092
Abstract:
A substrate structure includes a set of nanosheet layers stacked upon a substrate. The substrate structure includes a p-channel region and an n-channel region. The substrate structure further includes divots within the p-channel region and the n-channel region. A first liner is formed within the divots of the n-channel region. The first liner is formed of a material having a positive charge. A second liner is formed within the divots of the p-channel region. The second liner is formed of a material having a negative charge. A p-type epitaxy is deposited in the p-channel region to form first air gap spacers of the divots in the p-channel region. An n-type epitaxy is deposited in the n-channel region to form second air gap spacers of the divots in the n-channel region.
Information query
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