Invention Grant
- Patent Title: Embedded MRAM fabrication process for ion beam etching with protection by top electrode spacer
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Application No.: US16672110Application Date: 2019-11-01
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Publication No.: US11063208B2Publication Date: 2021-07-13
- Inventor: Harry-Hak-Lay Chuang , Jun-Yao Chen , Hung Cho Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Seed IP Law Group LLP
- Main IPC: G11C11/00
- IPC: G11C11/00 ; H01L43/02 ; H01L43/10 ; H01L43/12
Abstract:
An integrated circuit die includes a magnetic tunnel junction as a storage element of a MRAM cell. The integrated circuit die includes a top electrode positioned on the magnetic tunnel junction. The integrated circuit die includes a first sidewall spacer laterally surrounding the top electrode. The first sidewall spacer acts as a mask for patterning the magnetic tunnel junction. The integrated circuit die includes a second sidewalls spacer positioned on a lateral surface of the magnetic tunnel junction.
Information query
