Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US16719385Application Date: 2019-12-18
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Publication No.: US11069581B2Publication Date: 2021-07-20
- Inventor: Shibun Tsuda
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JPJP2018-243513 20181226
- Main IPC: H01L21/84
- IPC: H01L21/84 ; H01L21/8234 ; H01L27/12
Abstract:
The reliability of the semiconductor device is suppressed from deteriorating. A first gate electrode is formed on the semiconductor layer SM located in the SOI region 1A of the substrate 1 having the semiconductor base material SB, the insulating layer BX, and the semiconductor layer SM via the first gate insulating film, a second gate electrode is formed on the semiconductor base material SB located in the first region 1Ba of the bulk region 1B and on which the epitaxial growth treatment is performed via the second gate insulating film, and a third gate electrode is formed on the semiconductor base material SB located in the second region 1Bb of the bulk region 1B and on which the epitaxial growth treatment is not performed via the third gate insulating film.
Public/Granted literature
- US20200211909A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2020-07-02
Information query
IPC分类:
