Invention Grant
- Patent Title: Vertically stacked fin semiconductor devices
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Application No.: US16397452Application Date: 2019-04-29
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Publication No.: US11075266B2Publication Date: 2021-07-27
- Inventor: Praveen Joseph , Tao Li , Indira Seshadri , Ekmini A. De Silva
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Abdy Raissinia
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L29/66 ; H01L21/311 ; H01L21/8238 ; H01L27/092 ; H01L21/306 ; H01L21/02 ; H01L21/3065 ; H01L21/762

Abstract:
Semiconductor devices and methods of forming the same include forming a first dielectric layer around a semiconductor fin, formed from a first dielectric material, to a target height lower than a height of the semiconductor fin. A second dielectric layer is deposited on the first dielectric layer and is formed from a second dielectric material. A third dielectric layer, formed from the first dielectric material, is formed on the second dielectric layer. The second dielectric layer is etched away to expose a gap on the semiconductor fin. A portion of the semiconductor fin that is exposed in the gap is oxidized to form an isolation layer.
Public/Granted literature
- US20200343338A1 VERTICALLY STACKED FIN SEMICONDUCTOR DEVICES Public/Granted day:2020-10-29
Information query
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