Systems, methods, and circuitries are provided for supporting multiple concurrent thread access to a storage array. In one example, a storage array includes a plurality of storage devices each divided into at least N subdivisions. A volume includes a set of subdivisions including a subdivision in each of M different storage devices. Memory management circuitry receives first data and second data for storing in the storage array and selects a first volume for storing the first data and a second volume for storing the second data. The second volume includes a different set of subdivisions than the first volume. The processor uses a first set of processor threads to process and store the first data in the first volume and uses a second set of processor threads to, concurrent with the processing and storing of the first data, process and store the second data in the second volume.