Invention Grant
- Patent Title: Methods and apparatus to perform error detection and/or correction in a memory device
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Application No.: US16617411Application Date: 2017-06-27
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Publication No.: US11080135B2Publication Date: 2021-08-03
- Inventor: Yingwen Chen , Anil Agrawal , Fang Yuan , Qing Huang
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Hanley, Flight & Zimmerman, LLC
- International Application: PCT/CN2017/090259 WO 20170627
- International Announcement: WO2019/000206 WO 20190103
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G01R31/317

Abstract:
An example apparatus to monitor memory includes an error manager to compare a first memory location of a first error in the memory to a plurality of memory locations in an error history log, the plurality of memory locations previously identified in the error history log based on errors detected in the memory locations, ones of the memory locations associated with corresponding counters that track the errors detected in the memory locations, and update a first one of the counters corresponding to the first memory location when a first address of the first memory location matches a second address of one of the memory locations in the error history log. The example apparatus further includes a command generator to transmit a command to an error corrector to perform error correction on the first memory location when the first one of the counters satisfies a threshold.
Public/Granted literature
- US20200151056A1 METHODS AND APPARATUS TO PERFORM ERROR DETECTION AND/OR CORRECTION IN A MEMORY DEVICE Public/Granted day:2020-05-14
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