- Patent Title: Hardware countermeasures in a fault tolerant security architecture
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Application No.: US16048711Application Date: 2018-07-30
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Publication No.: US11080432B2Publication Date: 2021-08-03
- Inventor: Amritpal Singh Mundra
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Brian D. Graham; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F21/75
- IPC: G06F21/75 ; H03K17/22 ; H04L9/00 ; G06F21/85

Abstract:
A system-on-chip (SoC) is provided that includes security control registers, the security control registers including security flags for security critical assets of the SoC, wherein each security flag includes multiple bits. A set of security critical bits is signaled from a configuration storage of the SoC with a set of validation bits to be used to validate the set of security critical bits.
Public/Granted literature
- US20200034572A1 Hardware Countermeasures in a Fault Tolerant Security Architecture Public/Granted day:2020-01-30
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