Invention Grant
- Patent Title: Method of concurrent multi-state programming of non-volatile memory with bit line voltage step up
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Application No.: US16701450Application Date: 2019-12-03
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Publication No.: US11081184B2Publication Date: 2021-08-03
- Inventor: Zhiping Zhang , Muhammad Masuduzzaman , Huai-Yuan Tseng , Dengtao Zhao , Deepanshu Dutta
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Addison
- Agency: Dickinson Wright PLLC
- Agent Steven Hurles
- Main IPC: G11C16/12
- IPC: G11C16/12 ; G11C16/10 ; G11C16/26 ; G11C16/34 ; G11C16/24 ; G11C13/00 ; G11C16/04

Abstract:
A method of concurrently programming a memory. Various methods include: applying a non-negative voltage on a first bit line coupled to a first memory cell; applying a negative voltage on a second bit line coupled to a second memory cell, where the negative voltage is generated using triple-well technology; then applying a programming pulse to the first and second memory cells concurrently; and in response, programming the first and second memory cells to different states. The methods also include applying a quick pass write operation to the first and second memory cells, by: applying a quick pass write voltage to the first bit line coupled to the first memory cell, where the quick pass write voltage is higher than the non-negative voltage; applying a negative quick pass write voltage to the second bit line coupled to the first memory cell, where the negative quick pass write voltage is generated using triple-well technology.
Public/Granted literature
- US20210134370A1 METHOD OF CONCURRENT MULTI-STATE PROGRAMMING OF NON-VOLATILE MEMORY WITH BIT LINE VOLTAGE STEP UP Public/Granted day:2021-05-06
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