Invention Grant
- Patent Title: Semiconductor package with inner and outer cavities
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Application No.: US16282147Application Date: 2019-02-21
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Publication No.: US11081413B2Publication Date: 2021-08-03
- Inventor: Hsin Lin Wu , Yu-Hsuan Tsai , Chang Chin Tsai , Lu-Ming Lai , Ching-Han Huang
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H01L23/20
- IPC: H01L23/20 ; H01L23/043 ; H01L21/48 ; H01L23/10 ; H01L23/26 ; H01L23/053
Abstract:
A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.
Public/Granted literature
- US20190267298A1 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2019-08-29
Information query
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