A semiconductor device includes a substrate, an N-type bottom vertical gate-all-around (VGAA) transistor, a P-type bottom VGAA transistor, and a top VGAA transistor. The N-type bottom vertical gate-all-around (VGAA) transistor is over the semiconductor substrate and comprising a first nanowire made of InAs. The P-type bottom VGAA transistor is over the semiconductor substrate and comprising a second nanowire made of Ge. The top VGAA transistor is over the N-type bottom VGAA transistor, in which the top VGAA transistor includes a third nanowire in contact with the N-type bottom VGAA transistor, a fourth nanowire on and in contact with the third nanowire, and a bit line wrapping the fourth nanowire.