- Patent Title: System and method for computational transport network-on-chip (NoC)
-
Application No.: US16506871Application Date: 2019-07-09
-
Publication No.: US11082327B2Publication Date: 2021-08-03
- Inventor: Jeffrey L. Nye
- Applicant: ARTERIS, INC.
- Applicant Address: US CA Campbell
- Assignee: ARTERIS, INC.
- Current Assignee: ARTERIS, INC.
- Current Assignee Address: US CA Campbell
- Main IPC: H04L12/751
- IPC: H04L12/751 ; G06F15/78 ; G06N3/08 ; H04L12/727
Abstract:
A system and method are disclosed for performing operations on data passing through the network to reduce latency. The overall system allows data transport to become an active component in the computation, thereby improving the overall system latency, bandwidth, and/or power.
Public/Granted literature
- US20200213217A1 SYSTEM AND METHOD FOR COMPUTATIONAL TRANSPORT NETWORK-ON-CHIP (NoC) Public/Granted day:2020-07-02
Information query
