Invention Grant
- Patent Title: Hole connecting layer manufacturing method, circuit board manufacturing method and circuit board
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Application No.: US16642186Application Date: 2017-12-29
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Publication No.: US11083091B2Publication Date: 2021-08-03
- Inventor: Zeyang Lian , Sen Wu , Yanguo Li , Bei Chen
- Applicant: GUANGZHOU FASTPRINT CIRCUIT TECH CO., LTD. , SHENZHEN FASTPRINT CIRCUIT TECH CO., LTD. , YIXING SILICON VALLEY ELECTRONICS TECH CO., LTD.
- Applicant Address: CN Guangzhou; CN Shenzhen; CN Yixing
- Assignee: GUANGZHOU FASTPRINT CIRCUIT TECH CO., LTD.,SHENZHEN FASTPRINT CIRCUIT TECH CO., LTD.,YIXING SILICON VALLEY ELECTRONICS TECH CO., LTD.
- Current Assignee: GUANGZHOU FASTPRINT CIRCUIT TECH CO., LTD.,SHENZHEN FASTPRINT CIRCUIT TECH CO., LTD.,YIXING SILICON VALLEY ELECTRONICS TECH CO., LTD.
- Current Assignee Address: CN Guangzhou; CN Shenzhen; CN Yixing
- Agency: Dorsey & Whitney LLP
- Priority: CN201710470463.8 20170620
- International Application: PCT/CN2017/120094 WO 20171229
- International Announcement: WO2018/233272 WO 20181227
- Main IPC: H05K3/42
- IPC: H05K3/42 ; H05K1/11 ; H05K3/02 ; H05K3/46 ; H05K3/00

Abstract:
Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.
Public/Granted literature
- US20200315031A1 HOLE CONNECTING LAYER MANUFACTURING METHOD, CIRCUIT BOARD MANUFACTURING METHOD AND CIRCUIT BOARD Public/Granted day:2020-10-01
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