Invention Grant
- Patent Title: Method of forming shallow trench isolation structure
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Application No.: US16883204Application Date: 2020-05-26
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Publication No.: US11094579B2Publication Date: 2021-08-17
- Inventor: Yen-Bin Huang , Chien-Mao Chen , Yu-Hsuan Kuo , Shih-Kai Fan , Chia-Hung Lai , Kang-Min Kuo
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/3065 ; H01L21/306 ; H01L21/308

Abstract:
A method of forming a semiconductor structure includes depositing a mask layer over a substrate. The method includes etching the substrate to define a first opening. The method includes depositing a sacrificial material in the first opening. The method includes depositing a dielectric liner along sidewalls of the first opening, wherein a bottom surface of the dielectric liner contacts the sacrificial material. The method includes removing the sacrificial material. The method includes etching the substrate to enlarge the first opening to define a second opening. The second opening includes a first portion extending a first depth from the dielectric material in a first direction perpendicular to a top surface of the substrate, and a second portion extending in a second direction, parallel to the top surface of the substrate. The method includes removing the dielectric liner. The method includes filling the second opening with a dielectric material.
Public/Granted literature
- US20200286774A1 METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURE Public/Granted day:2020-09-10
Information query
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