Invention Grant
- Patent Title: Edge termination designs for semiconductor power devices
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Application No.: US15076553Application Date: 2016-03-21
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Publication No.: US11101346B2Publication Date: 2021-08-24
- Inventor: Jun Hu , Zhiyun Luo , Fei Wang
- Applicant: Jun Hu , Zhiyun Luo , Fei Wang
- Applicant Address: US CA San Bruno; US CA San Jose; US CA San Jose
- Assignee: Jun Hu,Zhiyun Luo,Fei Wang
- Current Assignee: Jun Hu,Zhiyun Luo,Fei Wang
- Current Assignee Address: US CA San Bruno; US CA San Jose; US CA San Jose
- Agent Bo-In Lin
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/78 ; H01L21/266 ; H01L21/761

Abstract:
This invention discloses a semiconductor power device formed on a semiconductor substrate comprises an active cell area and a termination area disposed near edges of the semiconductor substrate. The termination area comprises a plurality of duplicated units wherein each unit includes at least two trenches filled with a conductive trench material having a mesa area between adjacent trenches wherein the trenches and the mesa areas within each of the duplicated units are electrically shunt together. In the termination area each of the trenches in the duplicated units has a buried guard ring dopant region disposed below a bottom surface of the trenches.
Public/Granted literature
- US20190206986A1 EDGE TERMINATION DESIGNS FOR SEMICONDUCTOR POWER DEVICES Public/Granted day:2019-07-04
Information query
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