- Patent Title: Metal etching stop layer in magnetic tunnel junction memory cells
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Application No.: US16371784Application Date: 2019-04-01
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Publication No.: US11101429B2Publication Date: 2021-08-24
- Inventor: Tai-Yen Peng , Sin-Yi Yang , Chen-Jung Wang , Yu-Shu Chen , Chien Chung Huang , Han-Ting Lin , Jyu-Horng Shieh , Chih-Yuan Ting
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L43/12
- IPC: H01L43/12 ; H01L27/22 ; H01L43/02

Abstract:
A method of forming integrated circuits includes forming Magnetic Tunnel Junction (MTJ) stack layers, depositing a conductive etch stop layer over the MTJ stack layers, depositing a conductive hard mask over the conductive etch stop layer, and patterning the conductive hard mask to form etching masks. The patterning is stopped by the conductive etch stop layer. The method further includes etching the conducive etch stop layer using the etching masks to define patterns, and etching the MTJ stack layers to form MTJ stacks.
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