Invention Grant
- Patent Title: Comparator circuit arrangement and method of forming the same
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Application No.: US16971226Application Date: 2019-03-11
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Publication No.: US11108386B2Publication Date: 2021-08-31
- Inventor: Yoshio Nishida , Ravinder Pal Singh
- Applicant: Agency for Science, Technology and Research
- Applicant Address: SG Singapore
- Assignee: Agency for Science, Technology and Research
- Current Assignee: Agency for Science, Technology and Research
- Current Assignee Address: SG Singapore
- Agency: Winstead PC
- Priority: SG10201802382Y 20180322
- International Application: PCT/SG2019/050133 WO 20190311
- International Announcement: WO2019/182511 WO 20190926
- Main IPC: H03K5/22
- IPC: H03K5/22 ; H03K5/24 ; H03K5/05 ; H03K5/00

Abstract:
Various embodiments may provide a comparator circuit arrangement. The comparator circuit arrangement may include a preamplifier having a first input configured to be coupled to a first input voltage, a second input configured to be coupled to a second input voltage, and an output configured to generate a preamplifier output signal based on the first input voltage and the second input voltage. The comparator circuit arrangement may also include a switch circuit arrangement coupled to the preamplifier, the switch circuit arrangement configured to deactivate the preamplifier upon the second input voltage exceeding the first input voltage and further configured to activate the preamplifier upon a fall of the second input voltage, and a pull-up circuit arrangement coupled to the output of the preamplifier, the pull-up circuit arrangement configured to provide a boost voltage to the preamplifier output signal for a predetermined duration upon the fall of the second input voltage.
Public/Granted literature
- US20210119623A1 COMPARATOR CIRCUIT ARRANGEMENT AND METHOD OF FORMING THE SAME Public/Granted day:2021-04-22
Information query
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