Invention Grant
- Patent Title: Power optimization for memory subsystems
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Application No.: US16552243Application Date: 2019-08-27
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Publication No.: US11112982B2Publication Date: 2021-09-07
- Inventor: Deping He , David A. Palmer
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F3/06 ; G06F11/10

Abstract:
A processing device initializes a drive strength value of a storage device in an electronic device to a first level. The processing device detects an operation to be performed on the storage device and executes the operation. The processing device monitors a bit error rate occurring in the storage device as a result of executing the operation and determines if the bit error rate satisfies a threshold value. In response to determining that the bit error rate satisfies the threshold value, the processing device increases the drive strength value of the storage device to a second level and re-executes the operation at the increased drive strength value of the storage device.
Public/Granted literature
- US20210064256A1 POWER OPTIMIZATION FOR MEMORY SUBSYSTEMS Public/Granted day:2021-03-04
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