Invention Grant
- Patent Title: Handling errors in buffers
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Application No.: US16641387Application Date: 2018-08-30
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Publication No.: US11113164B2Publication Date: 2021-09-07
- Inventor: Balaji Venu , Matthias Lothar Boettcher , Mbou Eyole
- Applicant: ARM Limited
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Priority: GB1716280 20171005
- International Application: PCT/GB2018/052450 WO 20180830
- International Announcement: WO2019/069042 WO 20190411
- Main IPC: G06F11/22
- IPC: G06F11/22 ; G06F9/30 ; G06F9/46 ; G06F11/07 ; G06F11/10 ; G06F11/16 ; G06F11/18 ; G11C7/10

Abstract:
A buffer (72), (74), (76), (60), (78), (20), (82-90) has a number of entries for buffering items associated with data processing operations. Buffer control circuitry (100) has a redundant allocation mode in which, on allocating a given item to the buffer, the item is allocated to two or more redundant entries of the buffer. On reading or draining an item from the buffer, the redundant entries are compared and an error handling response is triggered if a mismatch is detected. By effectively reducing the buffer capacity, this simplifies testing for faults in buffer entries.
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