Invention Grant
- Patent Title: Semiconductor wafer, electronic device, method of performing inspection on semiconductor wafer, and method of manufacturing electronic device
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Application No.: US16549906Application Date: 2019-08-23
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Publication No.: US11114296B2Publication Date: 2021-09-07
- Inventor: Noboru Fukuhara , Yasuyuki Kurita , Takayuki Inoue
- Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
- Applicant Address: JP Tokyo
- Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
- Current Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
- Current Assignee Address: JP Tokyo
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: JPJP2017-034236 20170226
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/20 ; H01L29/423 ; H01L29/778

Abstract:
A semiconductor substrate in includes a buffer layer and a first crystalline layer. A bandgap of the first crystalline layer is smaller than a bandgap of a second layer. When a semiconductor wafer is formed as a transistor wafer, a channel of a transistor is formed at or near an interface between the first crystalline layer and the second layer. With a first electrode and a second electrode provided and a third electrode provided, when space charge redistribution, for emitting electrons and holes from a bandgap of a crystal positioned in the spatial region, is achieved by applying negative voltage to the third electrode or by applying positive voltage to the second electrode with the first electrode serving as a reference, an electron emission speed in the space charge redistribution is higher than a hole emission speed.
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