Invention Grant
- Patent Title: Method for fabrication of a semiconductor structure including an interposer free from any through via
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Application No.: US16305695Application Date: 2017-05-24
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Publication No.: US11114314B2Publication Date: 2021-09-07
- Inventor: Bich-Yen Nguyen , Ludovic Ecarnot , Nadia Ben Mohamed , Christophe Malville
- Applicant: Soitec
- Applicant Address: FR Bernin
- Assignee: Soitec
- Current Assignee: Soitec
- Current Assignee Address: FR Bernin
- Agency: TraskBritt
- Priority: FR1654831 20160530
- International Application: PCT/EP2017/062556 WO 20170524
- International Announcement: WO2017/207390 WO 20171207
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L21/48 ; H01L21/78

Abstract:
A method of forming a semiconductor structure includes introducing, at selected conditions, hydrogen and helium species (e.g., ions) in a temporary support to form a plane of weakness at a predetermined depth therein, and to define a superficial layer and a residual part of the temporary support; forming on the temporary support an interconnection layer; placing at least one semiconductor chip on the interconnection layer; assembling a stiffener on a back side of the at least one semiconductor chip; and providing thermal energy to the temporary support to detach the residual part and provide the semiconductor structure. The interconnection layer forms an interposer free from any through via.
Public/Granted literature
- US20200328094A1 METHOD FOR FABRICATION OF A SEMICONDUCTOR STRUCTURE INCLUDING AN INTERPOSER FREE FROM ANY THROUGH VIA Public/Granted day:2020-10-15
Information query
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