Invention Grant
- Patent Title: Bonding structure and method for manufacturing the same
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Application No.: US16584331Application Date: 2019-09-26
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Publication No.: US11114401B2Publication Date: 2021-09-07
- Inventor: Fei Liang , Jing Cao , Sheng Hu
- Applicant: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Applicant Address: CN Hubei
- Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: CN Hubei
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: CN201910411972.2 20190517
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/304 ; H01L25/065

Abstract:
A bonding structure and a method for manufacturing the bonding structure are provided. Multiple chips arranged in an array are formed on a surface of a wafer. Each of the chips includes a device structure, an interconnect structure electrically connected to the device structure, and a first package pad layer electrically connected to the interconnect structure. The first package pad layer is arranged at an edge region of the chip. A chip stack is obtained after bonding and cutting the multiple wafers, and the first package pad layer at the edge region of the chip is exposed.
Information query
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