Invention Grant
- Patent Title: Cap layer and anneal for gapfill improvement
-
Application No.: US16678537Application Date: 2019-11-08
-
Publication No.: US11114545B2Publication Date: 2021-09-07
- Inventor: De-Wei Yu , Chien-Hao Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/28

Abstract:
Embodiments disclosed herein relate generally to forming a gate layer in high aspect ratio trenches using a cyclic deposition-etch process. In an embodiment, a method for semiconductor processing is provided. The method includes performing a cyclic deposition-etch process to form a conformal film over a bottom surface and along sidewall surfaces of a feature on a substrate. The method includes forming a dielectric cap layer on the conformal film. The method includes performing an anneal process on the conformal film.
Public/Granted literature
- US20200075745A1 Cap Layer and Anneal for Gapfill Improvement Public/Granted day:2020-03-05
Information query
IPC分类: