Invention Grant
- Patent Title: System and method for integrated circuit usage tracking circuit with fast tracking time for hardware security and re-configurability
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Application No.: US15148700Application Date: 2016-05-06
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Publication No.: US11115022B2Publication Date: 2021-09-07
- Inventor: Jie Gu
- Applicant: Northwestern University
- Applicant Address: US IL Evanston
- Assignee: Northwestern University
- Current Assignee: Northwestern University
- Current Assignee Address: US IL Evanston
- Agency: Benesch, Friedlander, Coplan & Aronoff LLP
- Main IPC: G06F1/26
- IPC: G06F1/26 ; H03K3/03 ; H03K5/24 ; H03K19/0175 ; H03K3/356

Abstract:
An accelerated aging circuit is described to shorten the required stress time to a few seconds of operation. Due to the challenges posed by process variation in advanced CMOS technology, a stochastic processing methodology is also described to reduce the failure rate of the tracking and detection. Combining both circuit and system level acceleration, the creation of a silicon marker can be realized within seconds of usage in contrast with days of operation from previously reported aging monitor.
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