A protection method for protecting an FPGA against natural radiation, the method comprising the steps of: defining at least one category of constraining signals defined so that a predetermined placement and routing tool cannot route more than a determined maximum number of different constraining signals to any one zone of the surface of the FPGA; replicating an initial logic module in order to obtain a plurality of replicated logic modules forming a replicated logic cell; and associating constraining signals with the replicated logic modules in such a manner that the number of constraining signals associated with the replicated logic cell is greater than a determined maximum number in order to force the placement and routing tool to place the replicated logic modules of the replicated logic cell in distinct zones of the surface of the FPGA.