Invention Grant
- Patent Title: Flip chip package utilizing trace bump trace interconnection
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Application No.: US16888845Application Date: 2020-05-31
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Publication No.: US11121108B2Publication Date: 2021-09-14
- Inventor: Tzu-Hung Lin , Thomas Matthew Gregorich
- Applicant: MEDIATEK INC.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Agency: Wolf, Greenfield & Sacks, P.C.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498 ; H01L21/56 ; H01L23/31

Abstract:
A flip chip package includes a substrate having a die attach surface, and a die mounted on the die attach surface with an active surface of the die facing the substrate. The die includes a base, a passivation layer overlying the base, a topmost metal layer overlying the passivation, and a stress buffering layer overlying the topmost metal layer, wherein at least two openings are disposed in the stress buffering layer to expose portions of the topmost metal layer. The die is interconnected to the substrate through a plurality of conductive pillar bumps on the active surface. At least one of the conductive pillar bumps is electrically connected to one of the exposed portions of the topmost metal layer through one of the at least two openings.
Public/Granted literature
- US20200294948A1 FLIP CHIP PACKAGE UTILIZING TRACE BUMP TRACE INTERCONNECTION Public/Granted day:2020-09-17
Information query
IPC分类: