Gate-cut isolation structure and fabrication method
Abstract:
Certain aspects of the present disclosure generally relate to a semiconductor device with a gate-cut isolation structure. An example method of fabricating semiconductor device generally includes forming a dielectric region between a first semiconductor region and a second semiconductor region. The method also includes forming a first gate region disposed above and spanning a width of the dielectric region between the first and second semiconductor regions, wherein the first gate region is also disposed above at least a portion of the first semiconductor region and above at least a portion of the second semiconductor region. The method further includes concurrently forming an SDB and a gate-cut isolation structure, wherein the SDB intersects the first and second semiconductor regions and wherein the gate-cut isolation structure electrically separates the first gate region into a first portion associated with the first semiconductor region and a second portion associated with the second semiconductor region.
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