Voltage doubler using a switching regulator and voltage limiter
Abstract:
A voltage doubler circuit configuration includes a switching regulator having a variable input voltage and a regulated voltage, and a voltage doubler circuit that utilizes the regulated voltage of the switching regulator. The voltage doubler circuit includes an output capacitor that receives an elevated voltage from a voltage doubler capacitor and an electrical clamp that limits the voltage doubler capacitor from exceeding the regulated voltage. The output voltage is twice the regulated voltage minus circuit losses.
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