Invention Grant
- Patent Title: Wiring substrate
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Application No.: US17132376Application Date: 2020-12-23
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Publication No.: US11122686B2Publication Date: 2021-09-14
- Inventor: Yasuki Kimishima , Satoru Kawai
- Applicant: IBIDEN CO., LTD.
- Applicant Address: JP Gifu
- Assignee: IBIDEN CO., LTD.
- Current Assignee: IBIDEN CO., LTD.
- Current Assignee Address: JP Gifu
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JPJP2020-022675 20200213
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K3/00 ; H05K1/03 ; H05K3/06 ; H05K3/42

Abstract:
A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.
Public/Granted literature
- US20210259107A1 WIRING SUBSTRATE Public/Granted day:2021-08-19
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