Invention Grant
- Patent Title: Methods and systems for implementing redundancy in memory controllers
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Application No.: US16818949Application Date: 2020-03-13
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Publication No.: US11132255B2Publication Date: 2021-09-28
- Inventor: Ashish Singhai , Ashwin Narasimha , Kenneth Alan Okin
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Morgan, Lewis & Bockius LLP
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/00

Abstract:
The present disclosure relates to methods and systems for implementing redundancy in memory controllers. The disclosed systems and methods utilize a row of memory blocks, such that each memory block in the row is associated with an independent media unit. Failures of the media units are not correlated, and therefore, a failure in one unit does not affect the data stored in the other units. Parity information associated with the data stored in the memory blocks is stored in a separate memory block. If the data in a single memory block has been corrupted, the data stored in the remaining memory blocks and the parity information is used to retrieve the corrupted data.
Public/Granted literature
- US20200218609A1 Methods and Systems for Implementing Redundancy in Memory Controllers Public/Granted day:2020-07-09
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