Invention Grant
- Patent Title: Semiconductor device with dual isolation liner and method of forming the same
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Application No.: US16801576Application Date: 2020-02-26
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Publication No.: US11133230B2Publication Date: 2021-09-28
- Inventor: Yu-Kuan Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/092 ; H01L21/762

Abstract:
Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate having a first region and a second region; a first semiconductor fin formed on the substrate within the first region; a second semiconductor fin formed on the substrate within the second region; a first liner layer disposed along a lower portion of the first semiconductor fin and a lower portion of the second semiconductor fin; a second liner layer disposed over the first liner layer in the second region, wherein the second liner layer is different from the first liner layer in composition; and an isolation feature disposed on the first liner layer in the first region and on the second liner layer in the second region, and separating lower portions of the first semiconductor fin and the second semiconductor fin.
Public/Granted literature
- US20210265224A1 Semiconductor Device with Dual Isolation Liner and Method of Forming the Same Public/Granted day:2021-08-26
Information query
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