Invention Grant
- Patent Title: Chip to chip interconnect in encapsulant of molded semiconductor package
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Application No.: US16375479Application Date: 2019-04-04
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Publication No.: US11133281B2Publication Date: 2021-09-28
- Inventor: Khay Chwan Saw , Chau Fatt Chiang , Stefan Macheiner , Wae Chet Yong
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L21/48 ; H01L21/56 ; H01L23/495 ; H01L23/29 ; H01L25/065 ; H01L23/52 ; H01L21/60

Abstract:
A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.
Public/Granted literature
- US20200321276A1 Chip to Chip Interconnect in Encapsulant of Molded Semiconductor Package Public/Granted day:2020-10-08
Information query
IPC分类: