Invention Grant
- Patent Title: Gate-lifted NMOS ESD protection device
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Application No.: US16152142Application Date: 2018-10-04
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Publication No.: US11133299B2Publication Date: 2021-09-28
- Inventor: Da-Wei Lai , Stephen John Sque , Wilhelmus Cornelis Maria Peters
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L27/06 ; H02H9/04 ; H01L29/861 ; H01L29/08 ; H01L29/06 ; H01L29/10 ; H01L29/735
Abstract:
An ESD protection device including a PNP transistor connected to an input pad, a diode connected to the PNP transistor and connected to an output pad, and an NMOS transistor connected to the PNP transistor and the output pad, wherein the diode, PNP transistor, and NMOS transistor are configured to route different levels of an electrostatic discharge (ESD) current pulse from the input pad to the output pad.
Information query
IPC分类:
