Invention Grant
- Patent Title: Dual-port static random access memory cell layout structure
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Application No.: US16942544Application Date: 2020-07-29
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Publication No.: US11133322B2Publication Date: 2021-09-28
- Inventor: Dongcheng Wu , Maocheng Fan
- Applicant: SHANGHAI HUALI INTEGRATED CIRCUIT CORPORATION
- Applicant Address: CN Shanghai
- Assignee: SHANGHAI HUALI INTEGRATED CIRCUIT CORPORATION
- Current Assignee: SHANGHAI HUALI INTEGRATED CIRCUIT CORPORATION
- Current Assignee Address: CN Shanghai
- Agency: Alston & Bird LLP
- Priority: CN201911352471.8 20191225
- Main IPC: G11C11/419
- IPC: G11C11/419 ; H01L27/11 ; G11C11/412

Abstract:
The disclosure provides a dual-port static random access memory cell layout structure, including a pull-down transistor layout structure, a first and a second pass transistor layout structure. Each of them includes an active region pattern and a polysilicon pattern; and contact hole patterns. The active region pattern of the pull-down transistor layout structure and the first pass transistor layout structure are connected together, and share the contact hole pattern at one end. The active region pattern of the pull-down transistor layout structure and the second pass transistor layout structure are connected together, and share the contact hole pattern at the other end. The disclosure optimizes the dual-port static random access memory cell layout structure, improves the influence of the optical fillet effect on device matching, strengthens the performance including read-write crosstalk of the pull-down transistor under the situation of the same area, and increases the read current.
Public/Granted literature
- US20210202494A1 DUAL-PORT STATIC RANDOM ACCESS MEMORY CELL LAYOUT STRUCTURE Public/Granted day:2021-07-01
Information query
IPC分类: