- Patent Title: Plurality of stacked pillar portions on a semiconductor structure
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Application No.: US16572611Application Date: 2019-09-17
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Publication No.: US11139260B2Publication Date: 2021-10-05
- Inventor: Jung-Hua Chang , Szu-Wei Lu , Ying-Ching Shih
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L23/48 ; H01L23/28 ; H01L21/00 ; H01L21/44 ; H01L23/00 ; H01L23/31 ; H01L21/56 ; H01L25/065
Abstract:
A semiconductor structure including an integrated circuit die and conductive bumps is provided. The integrated circuit die includes bump pads. The conductive bumps are disposed on the bump pads. Each of the conductive bumps includes a first pillar portion disposed on one of the bump pads and a second pillar portion disposed on the first pillar portion. The second pillar portion is electrically connected to one of the bump pads through the first pillar portion, wherein a first width of the first pillar portion is greater than a second width of the second pillar portion. A package structure including the above-mentioned semiconductor structure is also provided.
Public/Granted literature
- US20210082850A1 SEMICONDUCTOR STRUCTURE AND PACKAGE STRUCTURE Public/Granted day:2021-03-18
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