Invention Grant
- Patent Title: Power-on reset circuit
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Application No.: US17034157Application Date: 2020-09-28
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Publication No.: US11139801B2Publication Date: 2021-10-05
- Inventor: Avinash Shreepathi Bhat
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Michael A. Davis, Jr.; Charles A. Brill; Frank D. Cimino
- Main IPC: H03K5/24
- IPC: H03K5/24 ; H03K3/012 ; A61N1/08 ; A61N1/378 ; H03K17/687 ; G06F1/24 ; A61N1/362

Abstract:
A power-on reset (POR) circuit includes first, second and third resistors. A first transistor has a first control terminal and first and second voltage terminals. A second transistor has a second control terminal and third and fourth voltage terminals. A third transistor has a third control terminal and fifth and sixth voltage terminals. The first control terminal is coupled via the first resistor to the second voltage terminal. The third voltage terminal is coupled via the second resistor to the first voltage terminal. The second control terminal is coupled via the third resistor to the fourth voltage terminal. The third control terminal is coupled to the third voltage terminal. The fifth voltage terminal is coupled to the first control terminal. A voltage buffer is coupled to the fifth voltage terminal.
Public/Granted literature
- US20210013872A1 POWER-ON RESET CIRCUIT Public/Granted day:2021-01-14
Information query
IPC分类: