Invention Grant
- Patent Title: Printed circuit board including warpage offset regions and semiconductor packages including the same
-
Application No.: US16689403Application Date: 2019-11-20
-
Publication No.: US11140772B2Publication Date: 2021-10-05
- Inventor: Shle-Ge Lee , Youngbae Kim
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Sughrue Mion, PLLC
- Priority: KR10-2017-0138563 20171024
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H01L25/065 ; H01L23/498 ; H01L23/00 ; H01L23/31

Abstract:
A printed circuit board can include a base layer, a first surface and a second surface opposite to each other. A first routing layer can be on the first surface and a second routing layer can be on the second surface, the first routing layer can be provided at an upper part of each of the first and second regions and the second routing layer can be provided at a lower part of each of the first and second regions. The upper part of the first region can have a first line-area ratio, the upper part of the second region can have a second line-area ratio, the lower part of the first region can have a third line-area ratio, the lower part of the second region can have a fourth line-area ratio, the second and third line-area ratios can be greater than each of the first and fourth line-area ratios.
Public/Granted literature
- US20200092989A1 PRINTED CIRCUIT BOARD INCLUDING WARPAGE OFFSET REGIONS AND SEMICONDUCTOR PACKAGES INCLUDING THE SAME Public/Granted day:2020-03-19
Information query