Invention Grant
- Patent Title: Memory device
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Application No.: US16816020Application Date: 2020-03-11
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Publication No.: US11145346B2Publication Date: 2021-10-12
- Inventor: Yorinobu Fujino
- Applicant: KIOXIA CORPORATION
- Applicant Address: JP Tokyo
- Assignee: KIOXIA CORPORATION
- Current Assignee: KIOXIA CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Holtz, Holtz & Volek PC
- Priority: JPJP2019-171651 20190920
- Main IPC: G11C11/16
- IPC: G11C11/16 ; H01L43/02 ; H01L27/22

Abstract:
According to one embodiment, a device includes a first cell between first and second interconnects; a second cell between second and third interconnects; a third cell between fourth and fifth interconnects; a fourth cell between fifth and sixth interconnects; a equalization circuit connected to the first to sixth interconnects; and a control circuit controlling operation on the first to fourth cells. During the operation, the control circuit applies a first voltage to the first interconnect, applies a second voltage higher than the first voltage to the second interconnect, applies a third voltage to the fifth interconnect, and applies a fourth voltage higher than the third voltage to the sixth interconnect. After the operation, the equalization circuit connects the first interconnect to the sixth interconnect.
Public/Granted literature
- US20210090628A1 MEMORY DEVICE Public/Granted day:2021-03-25
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